README (556B)
1 This is an implementation of arbitrary width multiplication in C. The main goal 2 here was to learn what CPU hardware features might benefit arbitrary width 3 multiplication (similar to how an ADDC (add with carry) instruction makes 4 arbitrary width addition efficient). I think the main takeaway is that an 5 FMAA (fused multiply-add-add) instruction would be useful, especially 6 considering Dadda multipliers (and probably other hardware multiplier designs) 7 can be extended with a relatively small amount of circuitry to support FMAA 8 without increasing latency.